FPGA & Embedded Vision · Case Study

mjpegZero: an FPGA JPEG encoder, from open core to 4Kp60 PRO

The full engineering case study - measured on a low-cost Artix-7, with the open code public so every number is checkable, and the PRO tier that takes it to product scale.

• Measured results - full and lite builds on an Artix-7 XC7A100T: LUT/FF/BRAM/DSP, ~150 MHz, ~8-line latency, ~4.7:1 compression.
• The UVC design - how a sensor + mjpegZero + a UVC endpoint becomes a plug-and-play webcam with no driver.
• mjpegZero PRO - up to 4Kp60 4:2:2 on low-cost parts, hardware bitrate and frame-rate control, and a complete RTP/JPEG Ethernet streaming reference system.
• Open / PRO / custom - how to evaluate the open core, licence PRO for a product, or commission custom work.

Want the overview first? See the mjpegZero project page for the open core and the PRO feature tier.